For an innovative imaging method, called 3DUSCTII, we acquire ultrasound pressure signals over time to reconstruct a reflectivity volume of the female breast for early breast cancer diagnosis. The demonstrator consists of hundreds of ultrasound transducers which can act as receiver or emitter and are positioned around a measurement container (see Fig.1).
In the USCT signal acquiring step good positioning of the breast is crucial for the imaging quality. The breast should be positioned centrally and as deep as possible inside the aperture’s imaging sweet-spot. Currently a B-Scan like imaging modality is provided to the USCT operator (see Fig.2). This allows patient feedback with movement instructions for improved positioning. While this B-scan like mode fulfils the requirements on robustness and imaging speed, the images are hard to read and require an experienced operator.
The goal of this work is the implementation of an Z-mode (depth detection) alternative mode based on the USCT main modality, reflectivity imaging (see Fig.3) but with a significantly reduced data set or the existing B-Scan like mode. While reduced image quality for positioning of the breast is acceptable, a high temporal resolution of the images is required (>1 FPS), requiring a different communication architecture in contrast to the usual USCT measurement approach. Solution approaches could be a compressed or reduced data format implemented directly before the data transfer bottleneck (inside Apache C-module) or even on step deeper in the FPGA where the DAQ takes place.
- Introduction to USCT hardware und software
- Design and simulation of the solution approaches in MATLAB
- Implementing the approach
- Evaluation with already existing patient data sets and experimental positioning evaluation with a breast-phantom
- Writing of the report and documentation
- Scientific working style: State-of-the-Art, simulation and test design, experimentation and evaluation
- Knowledge: programming required (specifically MATLAB and C), communication architectures, signal processing, eventually VHDL)
- 3 to 6 months (Bachelor, HIWI or internship)
Michael Zapf michael.zapf∂kit.edu, Tel. +49 0721 608 25677